1. Field of the Invention
The invention relates to the field of memories employing floating gate memory devices, particularly electrically programmable and electrically erasable memories.
2. Prior Art
Numerous memories are commericially available which employ floating gate memory devices programmed through avalanche injection or channel injection and erased by exposure to electromagnetic radiation. These read-mostly, non-volatile memories are typically used for storing programs or data and are frequently referred to as electrically programmable read-only memories (EPROM).
One disadvantage to these memories is that they are generally removed from their sockets when exposed to the erasing radiation. Obviously, it would be desirable to both electrically program and electrically erase these memories without removing them from their sockets or printed circuit boards. There are numerous publications discussing electrically programmable and electrically erasable floating gate read-only memories (E.sup.2 PROM); however, none of these memories have been commercially realized. For examples of electrically programmable and electrically erasable floating gate memory cells and memories see U.S. Pat. Nos. 3,797,000; 3,825,946; 4,051,464; 4,119,995; IBM Technical Disclosure Bulletin, Vol. 15, No. 9, February, 1973; and IEEE Journal of Solid State Circuits, Vol. SC-12, No. 5, October, 1977, in an article entitled, "An 8192-Bit Electrically Alterable ROM Employing A 1-Transistor Cell With Floating Gate".
The only commercially realized E.sup.2 PROMs known to Applicant are those employing silicon nitride layers for storage, frequently referred to as MNOS devices. These memories are difficult to use and often unreliable. Also, for the most part, these memories are relatively slow since they employ p-channel technology.
As will be described, the disclosed memory overcomes problems associated with currently available E.sup.2 PROMs in that the described memory is easy to use, reliable and relatively fast.